Edge-triggered and level-triggered flip-flops
Flip-flops triggered by edge (transition) or level (high/low state). Edge-triggered enable synchronous design; level-triggered simpler but cause race conditions.
Real World
Early Apollo Guidance Computer circuits used level-triggered latches, which caused timing glitches; modern Intel processors switched to edge-triggered flip-flops to eliminate these race conditions.
Exam Focus
Define 'race condition' if you mention it — examiners expect precise terminology, not just naming the problem.
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